An algorithm for reducing the number of CNOT gates of Clifford+T circuits
BU Dengli
Abstract：The number of T gates or the T-depth is commonly used to evaluate a fault-tolerant Clifford+T circuit.Nevertheless,the impact of CNOT gates of a Clifford+T circuit on the efficiency of quantum computing is not negligible.An algorithm by using template circuits is proposed for reducing the number of CNOT gates of a Clifford+T circuit.A set of Clifford+T circuits are used to validate the proposed algorithm.Experimental results show that,without impacting the number of T gates and the T-depth of the Clifford+T circuits,the proposed algorithm can reduce the number of CNOT gates by 12.58％while reducing the CNOT-depth by 5.35％on average.
Keywords：Clifford+T circuitsCNOT gatestemplate circuitsreduction
Publication Date：2024-12-15
Online Publishing Date：2025-08-15(First online date of this platform, not the publication date of the document)
Pages：7( 288-294 )