Non-robust path delay faults test generation algorithm based on artificial bee colony optimization
ZHAO Ying
MENG Xiang
LI Yan-juan
WANG Yi-fan
ZHAO Yan-chao
Abstract:The test generation algorithm based artificial bee colony optimization is proposed in this paper , be-cause the test generation time is long and faults coverage is low for non-robust path delay fault faults in digital circuits.This algorithm changes digital circuit into equivalent circuit according to circuit switching rule firstly , then constructs the constraint circuit for the single stuck-at fault equivalent circuit using Hopfield neural net-works and obtains the energy function .The test vectors for the single stuck-at fault in the equivalent circuit can be obtained by solving the minimum of energy function of the constraint circuit based on artificial bee colony op -timization method .Finally the test vectors pair for non-robust path delay fault in the original digital circuit can be obtained according to correspondence relation .The experimental results on ISCAS ’85 international standard circuits demonstrate the fault coverage can reach 98% and the average test generation time decreased signifi-cantly.
Keywords:non-robust path delay faultneural networksartificial bee colonyenergy function
Publication Date:2015-01-01
Online Publishing Date:2025-08-15(First online date of this platform, not the publication date of the document)
Pages:5( 18-22 )
