Design of CMOS AB class amplifier with high slew rate and low voltage
HU Rong
HE Shang-ping
LUO Xiao-qing
Abstract：In order to increase the unity gain frequency and slew rate and work under low supply voltage while reducing the bias current, an improved AB class amplifier based on 0. 18 μm CMOS process was designed. A multi-stage amplifier structure was adopted in the designed amplifier. The first stage was a NMOS differential pair with a current mirror load, the second inversion stage was realized by a common source amplifier, and the third stage was an AB class amplifier. The AB class amplifier could operate at ± 500 mV. The circuit simulation results show that the present amplifier has a phase margin of 87°, and the total compensation capacitance is 5 pF, which reduces by 50% compared with the conventional amplifiers. The unity gain frequency is 21. 17 MHz, which is about 10 times greater than that of conventional amplifiers. The slew rate is 7. 5 and 8. 57 V/μs, which increases about 2. 8 and 2. 6 times as that of conventional amplifiers, respectively. In addition, compared with those from other literatures, the present amplifier has a larger unity gain bandwidth and slew rate as well as smaller power consumption.
Keywords：analog integrated circuitCMOS AB class amplifierconversion ratelow voltagelow power consumptionunity gain frequencyphase marginresistive load
Publication Date：2017-01-01
Online Publishing Date：2025-08-15(First online date of this platform, not the publication date of the document)
Pages：6( 680-685 )