Research and Implementation of Long-delay Channel Simulation with Limited Hardware Resources
ZHANG Chensha
LI Peng
FENG Jiao
CHEN Pengwei
Abstract：With the increasing abundance of communication technology application scenarios,the data transmission environ-ment is becoming more and more complex,and the requirements for delay simulation in different application scenarios are increas-ing.However,due to the limitation of memory resources,the channel simulation system with fixed sampling rate cannot dynamically adjust the relationship between maximum time extension and sampling rate according to simulation requirements,resulting in waste of simulation resources.In order to improve the utilization of hardware resources,it is an urgent problem to complete channel simula-tion with variable sampling rate under the condition of hardware resource constraints.This paper proposes a method to simulate arbi-trary long delay channels by implementing variable sampling rate under fixed hardware resources,and implements this method on FPGA platforms.In this method,the Farrow resampling filter is used to complete the delay under low resources,and then the Far-row resampling filter is used to improve the accuracy of the signal.The verification results show that the simple-dual-port RAM can be combined with the Farrow filter to simulate the channel delay greater than 10 ms.
Keywords：Farrow filterlong latency channalresampling filterFPGA
Publication Date：2025-10-20
Online Publishing Date：2026-01-16(First online date of this platform, not the publication date of the document)
Pages：6( 2722-2727 )