Implementation of Verification Platform for Floating-Point Integer Mixed Arithmetic Unit
DAI Cheng
LI Tao
HE Xinghong
Abstract：In this paper,a verification platform based on SystemVerilog language is designed to complete the functional verifi?cation of combined floating-point and integer arithmetic unit. The platform contains two main points. One is that the Floating-Point Test-Suite developed by IBM laboratory is used for platform calibration. The other is to build an independent and complete verifica?tion channel for several test cases of each data type,which makes the platform's reusability and portability greatly improved. Final?ly,the coverage rate is 100% when the Covergroup is comparatively complete,which achieves the reliable verification of the design function. In addition,the directional test is used to automatically reproduce the problem,so as to achieve the rapid positioning and analysis of the problem.
Keywords：arithmetic unitSystemVerilogverification platformIBM Floating-Point Test-Suitereusableportable
Publication Date：2019-01-01
Online Publishing Date：2025-08-15(First online date of this platform, not the publication date of the document)
Pages：5( 1904-1908 )