Special TRL Standards for Monolithic Transistors Modeling
LIU Chen
SUN Jing
WU Aihua
LUAN Peng
ZHENG Yanqiu
LIANG Faguo
Abstract：On‐wafer TRL calibration standards on GaAs substrate for precision modeling on‐wafer transistors is de‐signed .The dielectric material and probe tips to the microstrip line structure on each port are taken into account during the design of these standards ,so the system reference plane after calibration is near the on‐wafer transistor chips .In order to validate the calibration results ,passive on‐wafer validation kits are manufactured .The experiment results show that the sys‐tem using the dedicated TRL standards to calibrate behaved is closer to the electromagnetic simulation values than the use of commercial standards ,and can achieve accurate extraction of the on‐wafer transistor model .
Keywords：on-wafer TRL calibrationon-wafer S-parameterstransistor characterization
Publication Date：2015-01-01
Online Publishing Date：2025-08-15(First online date of this platform, not the publication date of the document)
Pages：4( 21-23,74 )