Hardware Implementation of AES Fused with Multi-dimensional Chaos Theory
LI Jinming
WANG Xin
Abstract：The data parameters of the aircraft in the flight process have strong security requirements,so higher requirements are put forward for the encryption technology.AES is widely used but has the problems of single key and fixed key space.In this pa-per,based on the round key of 128-bit AES algorithm,the seed key and expansion key are recalcalated by two-dimensional logistic mapping to reduce the correlation between the keys.The design uses the resources of the chip XC7K160T for hardware implementa-tion,combined with FPGA synthesis simulation,the results show that the improved algorithm key quality is significantly improved,the difficulty coefficient of decipher is increased,the hardware implementation performance is stable,and the result is correct.
Keywords：AEStwo-dimensional logistic mappingFPGAkey spaceindependence
Publication Date：2024-12-20
Online Publishing Date：2025-08-15(First online date of this platform, not the publication date of the document)
Pages：7( 44-49,60 )